MC10E155FNR2

Overview

The MC10E155FNR2 is a 5V ECL 6-bit 2:1 multiplexer-latch integrated circuit manufactured by onsemi. It contains six independent 2:1 multiplexers followed by transparent latches with single-ended outputs. The device operates in PECL mode (VCC = 4.2 V to 5.7 V, VEE = 0 V) or NECL mode (VCC = 0 V, VEE = -4.2 V to -5.7 V). Key electrical parameters include a maximum toggle frequency of 1100 MHz and propagation delays ranging from 325 ps to 925 ps depending on the control path. It features asynchronous master reset, dual latch enables, and internal input pulldown resistors.

Feature Summary

• Contains six 2:1 multiplexers followed by transparent latches with single-ended outputs
• Supports both PECL and NECL operating voltage ranges
• Includes asynchronous master reset and dual latch enable controls
• Features internal input 50 kΩ pulldown resistors for stable logic levels

Applications

• High-speed data routing systems requiring multiplexing and latching
• Clock distribution networks utilizing ECL logic families
• Digital signal processing interfaces demanding low propagation delay

Procurement Notes

Verify the specific ordering suffix to confirm package type and environmental compliance. The 'FN' suffix indicates a standard PLCC-28 rail pack, while 'FNR2' denotes a tape and reel configuration. Ensure the 'G' suffix is included if lead-free components are required for assembly processes. Confirm moisture sensitivity level requirements against storage and handling protocols before procurement.

Selection Notes

Select this component when designing high-speed digital circuits requiring 6-bit parallel data selection and storage within a single package. The choice between the 10E and 100E series depends on temperature compensation needs, as the 100E series includes this feature. Verify that the system power supply architecture supports either PECL or NECL configurations to match the device's operating range.

Part Context

This part belongs to the MC10E/100E155 family of 5V ECL multiplexer-latches. It is distinct from other logic families due to its differential input structure and single-ended output capability. The device is housed in a 28-lead Plastic Leadless Chip Carrier (PLCC) package, suitable for surface-mount applications requiring robust thermal performance and high pin density.

Replacement Considerations

The MC100E155 is a functionally equivalent alternative within the same datasheet, offering temperature compensation not present in the MC10E155. Designers should verify pin compatibility and electrical parameter differences, particularly regarding propagation delay variations across temperature ranges, before substituting one for the other.

FAQ

What is the difference between PECL and NECL modes for this device?

PECL mode operates with VCC at 4.2 V to 5.7 V and VEE at 0 V, while NECL mode operates with VCC at 0 V and VEE at -4.2 V to -5.7 V. The internal circuitry adapts to these supply configurations.

How does the Master Reset function interact with the latch enables?

The Master Reset (MR) overrides all other controls, including the Latch Enables (LEN1, LEN2), to set the Q outputs LOW immediately, ensuring a known state regardless of the multiplexer select input.