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MC10ELT20DTG is listed in the Translators, Level Shifters range at ChipApex. The manufacturer field lists onsemi. Its product description is IC TRANSLATOR UNIDIR 8TSSOP. Review the specifications below when checking this part for your BOM.
The MC10ELT20DTG is a single-gate TTL to differential PECL translator manufactured by onsemi. It operates with a +5 V supply and ground, utilizing PNP TTL inputs for minimal loading. The device features flow-through pinouts and is housed in an 8-lead TSSOP package (CASE 948R). Key electrical parameters include a typical propagation delay of 1.2 ns at 25°C, a maximum toggle frequency of 100 MHz, and a power supply current of 16 mA. It supports an operating temperature range from -40°C to +85°C.
Verify the specific suffix DTG confirms the TSSOP-8 package and Pb-free status. Confirm the component meets the required environmental specifications for your application. Check the latest datasheet revision for any updates to electrical characteristics or ordering information before finalizing procurement.
Select this component when interfacing TTL logic with PECL loads in space-constrained designs. The TSSOP-8 package offers a compact footprint suitable for high-density boards. Ensure the system operates within the specified 4.75 V to 5.25 V supply range and temperature limits of -40°C to +85°C.
This part belongs to the MC10ELT/100ELT20 family of translators. The 'MC10' prefix indicates the standard commercial grade, while the '100' series variant includes temperature compensation. The DTG suffix specifies the TSSOP-8 package and RoHS compliance. This family is designed for applications prioritizing performance and low power consumption.
The MC100ELT20DTG is a compatible alternative offering temperature compensation. Other variants in the family include SO-8 packages (DG suffix) and tape & reel options (DTR2G suffix). Verify package compatibility and thermal requirements when substituting.
Pins 4 and 7 are designated as No Connect (NC) and should remain unconnected in the circuit design.
The output state is undetermined when the inputs are left open.
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