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MC10H117FNR2G is listed in the Gates And Inverters - Multi-Function, Configurable range at ChipApex. The manufacturer field lists onsemi. Its product description is IC 2-3INPUT OR/AND DUAL 20PLCC. Review the specifications below when checking this part for your BOM.
The MC10H117FNR2G is a dual 2-wide 2-3-input OR-AND/OR-AND-Invert gate from the MECL 10H family. It operates with a supply voltage of -5.2 V ±5%. The device features a typical propagation delay of 1.0 ns and power dissipation of 100 mW per gate. It provides an improved noise margin of 150 mV over the operating voltage and temperature range. The component is available in a 20-Lead PLLC package.
Verify the specific ordering suffix to confirm the package type, as the MC10H117 series includes multiple options such as PLLC-20, CDIP-16, SOEIAJ-16, and PDIP-16. Confirm RoHS compliance status by checking for the 'G' suffix designation on the part number. Ensure that the required shipping quantity matches the manufacturer's standard packaging units, which vary between rails and tape & reel formats depending on the selected package.
Select this component when a general-purpose logic element compatible with the MECL 10K family is required but faster switching speeds are necessary. The MECL 10H technology offers identical power-supply current consumption compared to the 10K family while delivering significantly reduced propagation delay. This makes it suitable for high-speed data control circuits where timing constraints are critical.
This device belongs to the MECL 10H logic family, which represents an evolution of the standard MECL 10K series. The primary distinction lies in the internal circuitry optimization that halves the propagation delay without increasing power consumption. The MC10H117 specifically implements complex logic functions within a dual-gate configuration, sharing Pin 9 between both gates to optimize pin count.
MC10H117FN
The MC10H117 is a functional and pinout duplication of the standard MECL 10K family part, offering a 100% improvement in propagation delay with no increase in power-supply current.
Pin 9 is common to both gates within the dual 2-wide 2-3-input OR-AND/OR-AND-Invert structure.
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