MC74ACT373DTR2

Latches Overview

The MC74ACT373DTR2G is an octal transparent latch with 3-state outputs manufactured by onsemi. It operates within a supply voltage range of 4.5 V to 5.5 V and features TTL-compatible inputs. The device provides eight D-type latches in a single package, supporting bus-organized system applications. Propagation delay from data input (Dn) to output (On) at 5.0 V is typically 8.5 ns, with a maximum of 10 ns. Output drive capability includes sourcing -24 mA and sinking 24 mA. Quiescent supply current is limited to 80 µA maximum.

Latches Feature Summary

• Contains eight D-type latches with 3-state standard outputs for bus interfacing
• Features TTL-compatible inputs for direct interface with TTL logic systems
• Outputs are controlled by Latch Enable (LE) and Output Enable (OE) signals

Latches Applications

• Bus organized system applications
• Data storage and buffering in digital circuits
• Interface between TTL and CMOS logic families

Latches Procurement Notes

Verify the complete part number suffix, as 'DTR2' indicates TSSOP-20 packaging with tape and reel shipping. Confirm RoHS compliance status via official documentation. Ensure ordering specifications match the required lead time and manufacturing lot requirements. Cross-reference datasheet revision numbers to guarantee parameter accuracy during procurement.

Latches Selection Notes

Select this component when eight latches with 3-state outputs are required in a compact surface-mount package. The ACT series offers faster propagation delays compared to AC counterparts while maintaining TTL input compatibility. Verify that the operating temperature range of -40°C to +85°C meets application environmental constraints. Ensure power supply stability within the 4.5 V to 5.5 V range for optimal performance.

Latches Part Context

This device belongs to the MC74AC/ACT373 family of octal transparent latches. It shares functional similarities with other members like MC74AC373 but differs in input threshold characteristics due to the ACT series design. The TSSOP-20 package provides a space-efficient solution for high-density PCB layouts compared to larger through-hole or wide SOIC packages.

Latches Replacement Considerations

MC74ACT373DWG (SOIC-20)

Latches FAQ

What is the function of the Latch Enable (LE) pin?

When LE is HIGH, the latches are transparent and data passes directly to the outputs. When LE transitions from HIGH to LOW, the data present at the inputs is latched and stored.

How does the Output Enable (OE) pin control the outputs?

When OE is LOW, the outputs are active and driven to the latched data levels. When OE is HIGH, the outputs enter a high impedance state, effectively disconnecting them from the bus.