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MEC1310-NU is listed in the Application Specific Microcontrollers range at ChipApex. The manufacturer field lists Microchip Technology. Its product description is IC EMBEDDED CTLR 128TQFP. Review the specifications below when checking this part for your BOM.
The MEC1310 is a 128-pin LPC-based Notebook I/O Controller designed for ACPI 2.0 and PC99/PC2001 compliance. It features a high-performance embedded 8051 keyboard and system controller with 64KB internal SRAM, 1KB Boot ROM, and 64 bytes of battery-backed registers. The device operates at 3.3V with 5V tolerant buffers on PS/2 pins and supports LPC bus frequencies from 19.2MHz to 33MHz. Key peripherals include four PS/2 ports, three I2C/SMBus controllers, a PECI interface, dual fan tachometer inputs, and a 10-bit ADC.
Verify the specific suffix against the Product Identification System. The 'NU' suffix denotes the 128-pin VTQFP package in standard tray packaging. An 'i' prefix indicates an industrial temperature range (-40°C to +85°C), while the blank prefix covers extended commercial (0°C to +85°C). Confirm RoHS compliance status as stated in the datasheet.
Select based on required memory size, as the MEC1310 provides 64KB of internal SRAM loaded via SPI. Ensure the design accommodates the 128-pin VTQFP package dimensions (14x14x1.0mm). Verify voltage requirements, noting the 3.3V operation with 5V tolerant PS/2 buffers. Check if the LPC bus frequency range (19.2MHz-33MHz) aligns with the host CPU interface.
The MEC1310 belongs to Microchip's family of notebook I/O controllers. It serves as a central hub for system management, integrating keyboard scanning, power control, and peripheral interfaces into a single LPC-connected component. It replaces discrete logic and separate EC functions in legacy designs.
No public confirmed substitute part numbers are available in the provided documentation. Cross-referencing requires checking pin compatibility and firmware architecture with alternative embedded controllers.
The MEC1310 supports LPC Bus frequencies ranging from 19.2MHz to 33MHz.
The 64KB internal SRAM is loaded at VCC1 power from the HOST/8051 SPI Memory Interface and provides 64KB of 8051 program space, with a 32k-Byte region shared with 8051 data space.
Yes, it includes 64 bytes of VCC0 backed registers and a VCC0 backed status register.
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