MK2058-01SI

Clock Generators, PLLs, Frequency Synthesizers Overview

The MK2058-01SI is a VCXO-based clock jitter attenuator IC manufactured by Renesas Electronics Corporation (formerly IDT). It regenerates system clocks with low phase noise using an external quartz crystal. The device supports selectable input/output frequency ranges from 4 kHz to 27 MHz, maintaining a fixed 1:1 ratio. It features a dual-input multiplexer for reference clock selection without output glitches. Powered by a single 3.3 V supply, it operates within the industrial temperature range of -40°C to +85°C and is housed in a 20-pin SOIC package.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• VCXO-based architecture provides excellent jitter attenuation and low phase noise generation
• Dual input multiplexer allows seamless switching between two reference clocks without output glitches
• Supports selectable frequency ranges from 4 kHz to 27 MHz via SEL pin configuration
• Single 3.3 V power supply operation with industrial temperature rating (-40°C to +85°C)

Clock Generators, PLLs, Frequency Synthesizers Applications

• Telecommunications system clock distribution
• Recovered data or video clock regeneration
• General purpose distributed system clock jitter attenuation

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify component authenticity as this part may be End-of-Life (EOL) for non-green configurations. Confirm RoHS compliance status if lead-free packaging is required. Check current manufacturer documentation for availability updates and alternative sourcing options due to potential discontinuation.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select appropriate external loop filter components (RZ, C1, C2) to tailor PLL bandwidth and damping factor for specific jitter requirements. Ensure the external quartz crystal meets recommended parameters for zero frequency error at 14 pF load capacitance. Configure SEL pins to match the desired input/output frequency range and crystal multiplier.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the communications clock jitter attenuator family. It replaces costly hybrid VCXO retiming modules by integrating VCXO and synthesizer functions into a monolithic CMOS IC. The device is designed for applications requiring stable clock signals derived from lower-frequency references.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Publicly confirmed substitute part numbers are not available in the provided source material. Verify compatibility with existing PCB layout and crystal specifications when considering alternatives.

Clock Generators, PLLs, Frequency Synthesizers FAQ

How does the MK2058-01 handle input clock switching?

The device uses a dual input mux to select between ICLK1 and ICLK2. Switching occurs without generating output glitches due to the fly-wheel effect of the VCXO.

What is the role of the external crystal?

The external pullable quartz crystal works with the internal VCXO circuit to generate the output clock. It must meet specific load capacitance requirements (typically 14 pF total) for optimal performance.

Can the PLL loop bandwidth be adjusted?

Yes, the loop bandwidth and damping factor can be tailored by selecting external loop filter components (RZ, C1, C2) connected to the CHGP and VIN pins.