MPC8347CZQADDB

Overview

The MPC8347CZQADDB is a PowerQUICC II Pro integrated host processor based on the e300 core. It operates at up to 667 MHz with 32 KB instruction and data caches. The device features dual 10/100/1000 Ethernet controllers, a PCI interface, dual USB 2.0 controllers, and a DDR SDRAM controller supporting ECC. It includes an integrated security engine for encryption algorithms.

Feature Summary

• Integrated high-performance superscalar e300 processor core
• Dual three-speed Ethernet controllers compliant with IEEE standards
• Hardware-accelerated security engine supporting multiple cryptographic algorithms
• Comprehensive peripheral set including PCI, USB, and local bus

Applications

• Ethernet routers and switches
• Wireless LAN devices
• Network storage systems
• Industrial control equipment

Procurement Notes

Verify silicon revision compatibility before integration. Early revisions (1.1 and earlier) are documented in MPC8347EEC Rev. 11. Later revisions (3.0 and later) require reference to MPC8347EA specifications. Confirm ordering suffixes match the required hardware version.

Selection Notes

Select this component for applications requiring high integration of networking and processing functions. Ensure design supports the specific voltage requirements: 1.2 V for the core and 2.5 V or 3.3 V for I/O interfaces. Verify thermal management capabilities against power dissipation profiles.

Part Context

This part belongs to the NXP PowerQUICC II Pro family, designed as a successor to the PowerQUICC II series. It utilizes the e300 SoC platform, offering enhanced cache and performance over previous generations while maintaining software compatibility with older architectures.

Replacement Considerations

Check for MPC8349E for similar feature sets with potential differences in interface counts. Review MPC8347EA datasheets if utilizing silicon revision 3.0 or newer.