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Product Detailed Parameters
- Description:IC MPU MPC83XX 400MHZ 620HBGA
- Series:MPC83xx
- Mfr:NXP USA Inc.
- Package:Tray,Tray
- Core Processor:PowerPC e300
- Number of Cores/Bus Width:1 Core, 32-Bit
- Speed:400MHz
- Co-Processors/DSP:Security; SEC
- RAM Controllers:DDR
- Graphics Acceleration:No
- Display & Interface Controllers:-
- Ethernet:10/100/1000Mbps (2)
- SATA:-
- USB:USB 2.0 + PHY (2)
- Voltage - I/O:2.5V, 3.3V
- Operating Temperature:0°C ~ 105°C (TA)
- Security Features:Cryptography, Random Number Generator
- Mounting Type:Surface Mount
- Package / Case:620-BBGA Exposed Pad
- Supplier Device Package:620-HBGA (29x29)
- Additional Interfaces:DUART, I2C, PCI, SPI
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Overview
The MPC8347EZQAGDB is a PowerQUICC II Pro integrated host processor based on the e300 core. It operates at up to 667 MHz with 32-Kbyte instruction and data caches. The SoC integrates dual three-speed Ethernet controllers, a PCI interface, DDR SDRAM memory controller supporting ECC, and dual USB 2.0 controllers. A dedicated security engine handles encryption algorithms including AES and DES. The device utilizes a 130 nm CMOS process and features a 672-pin TBGA package.
Feature Summary
- Integrated high-performance superscalar e300 processor core
- Dual three-speed Ethernet controllers for network connectivity
- Hardware security engine for cryptographic offloading
- DDR SDRAM controller with error checking and correction
Applications
- Ethernet routers and switches
- Wireless LAN devices
- Network storage systems
- Industrial control equipment
Procurement Notes
Verify silicon revision compatibility before integration. This document covers revision 1.1 silicon and earlier; later revisions require separate hardware specifications. Confirm package pinout alignment with PCB layout. Ensure power sequencing meets absolute maximum ratings to prevent damage during initialization.
Selection Notes
Select this component for applications requiring integrated networking and security processing. Evaluate thermal dissipation requirements against typical power profiles. Verify software compatibility with existing Power Architecture codebases. Consider the specific I/O voltage levels required for DDR and Ethernet interfaces.
Part Context
This part belongs to the PowerQUICC II Pro family, representing an upgrade to the PowerQUICC II series. It builds upon the e300 SoC platform, offering enhanced cache and peripheral integration compared to previous generations. The architecture maintains software compatibility with older Freescale processors while providing higher performance capabilities.
Replacement Considerations
Consult NXP product summaries for current availability status. Verify if newer families such as Power Architecture T1013 or Arm LS1012 are suitable alternatives for new designs.
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