— IC芯片 | 连接器 | 传感器 | 被动器件 —
Product Detailed Parameters
- Description:IC MPU MPC83XX 266MHZ 620HBGA
- Series:MPC83xx
- Mfr:NXP USA Inc.
- Package:Tray
- Core Processor:PowerPC e300
- Number of Cores/Bus Width:1 Core, 32-Bit
- Speed:266MHz
- Co-Processors/DSP:-
- RAM Controllers:DDR
- Graphics Acceleration:No
- Display & Interface Controllers:-
- Ethernet:10/100/1000Mbps (2)
- SATA:-
- USB:USB 2.0 + PHY (2)
- Voltage - I/O:2.5V, 3.3V
- Operating Temperature:0°C ~ 105°C (TA)
- Security Features:-
- Mounting Type:Surface Mount
- Package / Case:620-BBGA Exposed Pad
- Supplier Device Package:620-HBGA (29x29)
- Additional Interfaces:DUART, I2C, PCI, SPI
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Overview
The MPC8347VRADDB is a PowerQUICC II Pro integrated host processor based on the e300 core, operating at up to 667 MHz. It features a 130 nm CMOS process with a 1.2 V core voltage and 2.5 V/3.3 V I/O voltages. The device includes dual three-speed Ethernet controllers, a PCI interface, DDR1/DDR2 memory controller supporting ECC, dual USB 2.0 controllers, and an integrated security engine for cryptographic acceleration.
Feature Summary
- Integrated high-performance superscalar e300 processor core with dynamic power management
- Dual three-speed Ethernet controllers compliant with IEEE 802.3 standards
- Integrated security engine supporting multiple encryption algorithms and public key acceleration
- Support for DDR1/DDR2 SDRAM with full error checking and correction capabilities
Applications
- Ethernet routers and switches
- Wireless LAN (WLAN) devices
- Network storage systems
- Industrial control equipment
Procurement Notes
Verify silicon revision level before procurement; this document applies to revision 3.x silicon and later. Confirm ordering suffixes match specific package and temperature requirements. Check for product change notifications regarding end-of-life status or replacement families. Ensure compatibility with existing board designs regarding power sequencing and voltage levels.
Selection Notes
Select based on required clock frequency and package type. Verify support for DDR1 versus DDR2 depending on memory subsystem design. Consider the integrated security engine if IPsec or SSL/TLS processing is required. Ensure local bus and PCI interface requirements align with peripheral connectivity needs.
Part Context
Part of the PowerQUICC II Pro family, offering enhanced performance over previous generations. Built on the e300 SoC platform for networking and embedded applications. Designed for cost-effective integration in communication infrastructure.
Replacement Considerations
Check NXP documentation for recommended replacement families such as Power Architecture T1013 or Arm Architecture LS1012/LS1023 for new designs.
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