MPC8349EVVALFB

Overview

The MPC8349EVVALFB is a PowerQUICC II Pro integrated host processor based on the e300 core, operating at up to 667 MHz. It features dual three-speed Ethernet controllers (TSECs), dual PCI interfaces, and a DDR/DDR2 memory controller supporting ECC. The device includes a hardware security engine for encryption algorithms, dual USB controllers, and a local bus controller. Manufactured using 130 nm CMOS technology, it utilizes a 672-pin TBGA package with 1 mm pitch.

Feature Summary

• Integrated e300 superscalar processor core with dynamic power management
• Dual three-speed Ethernet controllers compliant with IEEE standards
• Hardware security engine supporting multiple cryptographic algorithms
• Dual PCI interfaces with host bridge capabilities

Applications

• Ethernet routers and switches
• Wireless LAN devices
• Network storage systems
• Industrial control equipment

Procurement Notes

Verify silicon revision compatibility; this document covers revision 3.x silicon and later. Confirm ordering suffixes match specific voltage and frequency requirements. Check for published errata updates on the manufacturer's website before finalizing procurement specifications.

Selection Notes

Select based on required clock speed and I/O voltage levels. Ensure system design supports the necessary power sequencing to avoid excessive current draw during startup. Verify that the application requires the specific peripheral mix of dual TSECs and dual PCI interfaces provided by this model.

Part Context

This component belongs to the PowerQUICC II Pro family, representing an upgrade to the PowerQUICC II series. It integrates the enhanced e300 core with advanced peripherals like DDR2 support and high-speed networking interfaces, targeting high-performance embedded communication applications.

Replacement Considerations

MPC8349E

FAQ

What is the maximum operating frequency of the e300 core?

The e300 processor core operates at frequencies up to 667 MHz.

Does the memory controller support error correction?

Yes, the DDR/DDR2 memory controller provides full error checking and correction (ECC) support.