NB100LVEP17DT

Specialty Logic Overview

The NB100LVEP17DT is a discontinued quad differential driver/receiver from onsemi, packaged in TSSOP-20. It operates with a typical propagation delay of 250 ps and supports maximum input clock frequencies exceeding 2.5 GHz. The device functions within PECL mode (VCC = 2.375 V to 3.8 V, VEE = 0 V) or NECL mode (VCC = 0 V, VEE = -2.375 V to -3.8 V). It features an internal VBB reference voltage output for single-ended inputs and includes internal pull-down/pull-up resistors.

Specialty Logic Feature Summary

• Incorporates two stages of internal gain suitable for high bandwidth amplifier applications
• Provides an internally generated VBB pin for use as a switching reference voltage or AC coupling rebias
• Outputs default to LOW state when differential inputs are open or connected to VEE

Specialty Logic Applications

• High bandwidth amplifier circuits
• PECL and NECL logic systems
• Differential signal transmission interfaces

Specialty Logic Procurement Notes

This component is officially discontinued and no longer available for new orders. Verify the obsolete status through official manufacturer channels before design finalization. Sourcing must rely on surplus distributors or alternative replacement components. Confirm RoHS compliance and package integrity if procuring existing stock.

Specialty Logic Selection Notes

Select this part only for legacy system maintenance where the specific TSSOP-20 footprint and ECL characteristics are required. Evaluate thermal resistance values for the specific PCB layout, as junction-to-ambient ratings vary significantly between single-layer and multilayer test boards. Ensure power supply decoupling meets the specified requirements for the VBB pin.

Specialty Logic Part Context

Part of the NB100LVEP17 family, which also includes QFN-24 variants (NB100LVEP17MNG). The DT suffix specifically denotes the TSSOP-20 surface-mount package. This series belongs to the broader 100LV ECL logic family designed for high-speed data processing and clock distribution tasks.

Specialty Logic Replacement Considerations

• NB100LVEP17MNG
• NB100LVEP17DTR2G

Specialty Logic FAQ

How should the VBB pin be handled during operation?

The VBB pin provides an internally generated reference voltage. When used for single-ended inputs, it must be decoupled via a 0.01 μF capacitor, and current sourcing/sinking must be limited to 0.5 mA. If unused, the pin should be left open.

What is the default output state if inputs are left unconnected?

If the differential inputs are open or connected to VEE, the Q outputs will default to a LOW state.