NSBC123TDP6T5G

Overview

The NSBC123TDP6T5G is a dual digital transistor from onsemi, integrating two NPN transistors with built-in bias resistors into a single SOT-563-6 surface-mount package. This configuration provides a maximum collector-emitter voltage (VCEO) of 50 V and a continuous collector current (IC) of 100 mA. The device features a typical input resistance of 2.2 kOhms and a minimum DC current gain (hFE) of 8. It operates within a temperature range of -55°C to +150°C and has a power dissipation rating of 357 mW.

Feature Summary

• Integrates dual NPN transistors with built-in bias resistors for simplified circuit design
• Compact SOT-563-6 surface-mount package suitable for space-constrained applications
• High thermal stability with an extended operating temperature range up to 150°C

Applications

• General-purpose switching in low-voltage digital logic circuits
• Level shifting between different voltage domains in embedded systems
• Driver stages for small-signal loads in consumer electronics

Procurement Notes

Verify the exact ordering suffix against official manufacturer documentation to ensure correct packaging and tape-and-reel specifications. Confirm RoHS compliance status through the latest datasheet or product compliance reports before finalizing procurement plans.

Selection Notes

Select this component when a dual NPN configuration with integrated biasing is required to reduce board space and external component count. Ensure the 50 V voltage rating and 100 mA current capacity meet the specific load requirements of the target application circuit.

Part Context

This part belongs to the NSBC123 series of dual digital transistors manufactured by onsemi. It shares the same internal topology as other variants in the family but is distinguished by its specific packaging and commercial-grade temperature ratings defined in the official product specification.

Replacement Considerations

Direct substitutes include NSBC123EDXV6T1G and NSBC123JPDXV6T1G, which share identical electrical characteristics and pinout configurations. Verify package compatibility and specific suffix variations before implementation.