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The PBLS2003D,115 is a dual digital transistor in a SOT457 (SC-74) package. It integrates a PNP low VCEsat Breakthrough in Small Signal (BISS) transistor and an NPN Resistor-Equipped Transistor (RET). The PNP section supports a collector current of -1 A with a maximum collector-emitter voltage of -20 V. The NPN section features a bias resistor of 10 kOhms typical value and handles up to 100 mA output current at 50 V collector-emitter voltage. Operating temperatures range from -65 °C to +150 °C.
Verify the specific ordering suffix against official Nexperia documentation to confirm packaging details such as tape and reel specifications. Ensure compatibility with standard SMD reflow or wave soldering processes defined in the datasheet footprint diagrams. Confirm RoHS compliance status through the manufacturer's latest product change notifications before finalizing procurement orders.
Select this component when a combined load switch and logic interface function is required in limited board space. The PNP BISS transistor offers lower saturation resistance than standard small signal transistors, improving efficiency in high-current paths. Verify that the integrated 10 kOhm input resistor on the NPN side meets the driving circuit requirements without external base resistors.
This part belongs to the Nexperia PBLS series of pre-biased double transistors. These devices are designed to replace multiple discrete components by integrating a switching transistor with its necessary biasing network. The SC-74 package provides a small footprint suitable for dense consumer electronics and automotive applications where board real estate is constrained.
Check for direct equivalents in the PBLS family with matching voltage ratings and pin configurations. Verify that any substitute maintains the same BISS technology characteristics for the PNP section and identical resistor ratios for the NPN section to ensure circuit performance parity.