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The PBLS4003D,115 is a dual digital transistor in a SOT457 (SC-74) TSOP6 package. It integrates a PNP low VCEsat loadswitch transistor and an NPN Resistor-Equipped Transistor (RET). The PNP section supports a collector current of -1 A with a maximum collector-emitter voltage of -40 V. The NPN RET provides an output current of 100 mA with a collector-emitter voltage of 50 V and includes a typical 10 kΩ input bias resistor.
Verify the specific ordering suffix against official Nexperia documentation to confirm packaging details. Confirm RoHS compliance status through the manufacturer's latest product data sheet before finalizing procurement plans. Ensure design compatibility with the specified thermal resistance values for the target PCB footprint.
Select this component when a compact solution is required for switching loads with low drive power requirements. The integrated bias resistor simplifies circuit design by eliminating external base resistors. Verify that the operating voltage and current limits of both the PNP and NPN sections align with the application specifications.
This device belongs to the Nexperia PBLS series of pre-biased transistors. These components are designed to replace multiple discrete components, including transistors and resistors, thereby reducing assembly time and printed circuit board area. The SOT457 package is a standard small outline package suitable for high-density surface mount applications.
Check for direct substitutes within the Nexperia PBLS family that share the same pinout and electrical characteristics. Verify that any alternative component meets the AEC-Q101 qualification if automotive reliability is required. Ensure the replacement package matches the SOT457 dimensions for mechanical compatibility.