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The PBLS6005D,115 is a dual digital transistor from Nexperia, integrating an NPN Resistor-Equipped Transistor (RET) and a PNP low VCEsat transistor within a single SOT457 (SC-74/TSOP-6) surface-mount package. It features a collector-emitter maximum voltage (VCEO) of 50 V for both polarities. The device supports a continuous collector current of 100 mA for the NPN section and 1 A for the PNP section, with a peak DC collector current rating of 100 mA. It includes typical base input resistors of 47 kOhms with a ratio of 1. The component operates across a temperature range from -65 °C to +150 °C.
Verify the specific ordering suffix against official Nexperia documentation to confirm packaging type and compliance status. Ensure the requested quantity aligns with standard factory reel sizes or cut tape availability. Confirm that the SOT457 package variant matches the design requirements for thermal and spatial constraints before finalizing orders.
Select this component when a mixed NPN/PNP configuration is required in a minimal footprint. The integrated resistor simplifies biasing networks, reducing external component count. Verify that the 50 V voltage rating and current capabilities meet the specific load requirements of the target circuit application.
This part belongs to the Nexperia PBLS series of dual digital transistors designed for space-constrained designs. It replaces discrete transistor and resistor combinations, offering a standardized solution for logic level shifting and switching tasks in portable and industrial electronics.
Direct substitutes include other Nexperia dual digital transistors with similar pinouts and electrical ratings, such as the PBLS6003D or PBLS4005D, provided the voltage and current specifications match the original design requirements.