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The PUMB19 is a dual PNP resistor-equipped transistor housed in a SOT363 (SC-88) plastic surface-mounted package. It integrates two independent PNP transistors with a built-in bias resistor R1 of 22 kΩ connected to the first input, while the second input remains open. The device supports a maximum collector-emitter voltage (VCEO) of -50 V and a DC output current (IO) of -100 mA per transistor. Key electrical characteristics include a minimum DC current gain (hFE) of 100 at IC = -1 mA and a typical collector-base cut-off current of -100 nA. Total power dissipation is rated at 300 mW for the device at Tamb ≤ 25 °C.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm the packing method. The standard configuration utilizes a 4 mm pitch tape and reel format. Confirm that the component status aligns with current production requirements before finalizing procurement plans.
Select this component when space constraints require a dual PNP solution with integrated base resistance. Ensure the application operates within the -50 V collector-emitter voltage limit and does not exceed the -100 mA DC output current rating per channel. Verify thermal management capabilities if operating near the maximum junction temperature limits.
This component belongs to the family of resistor-equipped transistors designed to replace multiple discrete components. It serves as a compact alternative to separate PNP transistors and base resistors, particularly useful in dense printed-circuit board layouts where minimizing footprint and assembly steps is critical for manufacturing efficiency.
The PEMB19 is the SOT666 package equivalent. For NPN/NPN complements, consider the PUMD19 or PUMH19 variants depending on the required package type.