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The PEMB30 is a PNP/PNP double resistor-equipped transistor (RET) housed in an SOT666 surface-mounted device plastic package. It integrates two PNP transistors with built-in bias resistors, where R1 is specified at 2.2 kΩ and R2 remains open. The device supports a collector-emitter voltage of -50 V and provides an output current capability of -100 mA per transistor. Key electrical characteristics include a DC current gain (hFE) of 30 at -20 mA collector current and a maximum collector-emitter saturation voltage of -150 mV at -10 mA. Thermal resistance from junction to ambient is rated at 625 K/W per transistor.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm the correct packing method and tape pitch. Confirm that the source document reflects the current product status, as business transfers may affect availability channels. Ensure the procurement channel is authorized to provide genuine components matching the SOT666 package specifications.
Select the PEMB30 when a compact solution for driving multiple IC inputs or low-current loads is required without external base resistors. Verify that the -50 V collector-emitter voltage rating meets the system's negative supply requirements. Ensure the PCB layout accommodates the SOT666 footprint and that thermal dissipation limits are respected under maximum ambient temperature conditions.
The PEMB30 belongs to the family of NXP Nexperia Resistor-Equipped Transistors (RETs). It serves as a surface-mount alternative to through-hole discrete transistor pairs. The device is designed to replace separate transistor and resistor combinations, thereby reducing assembly complexity and board space usage in consumer and industrial electronics.
The PEMD30 is listed as the NPN/NPN complement within the same product family. Designers requiring an NPN configuration should verify pinout compatibility and electrical symmetry before substitution.