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The PEMD13,115 is a 50 V, 100 mA NPN/PNP Resistor-Equipped Double Transistor (RET) manufactured by Nexperia USA Inc. It integrates an NPN and a PNP transistor with built-in bias resistors in an ultra-small SOT666 surface-mount package. The device features a collector-emitter voltage of 50 V, a maximum output current of 100 mA per transistor, and a total power dissipation of 200 mW per transistor or 300 mW per device at 25 °C. Internal bias resistors are specified as R1 = 4.7 kΩ and R2 = 47 kΩ, providing a ratio of 10. Transition frequencies reach 230 MHz for the NPN section and 180 MHz for the PNP section.
Verify that the specific order code PEMD13,115 matches the required SOT666 package variant. Confirm that the non-automotive qualification status aligns with the target application requirements, as this product lacks AEC-Q101 certification. Ensure design reviews account for the specific thermal derating curves provided in the datasheet when operating above ambient temperatures.
Select the PEMD13,115 when a complementary NPN/PNP pair with integrated biasing is required in space-constrained designs. The fixed resistor values suit standard logic interface applications. Consider the PEMH13 or PEMB13 if dual NPN or dual PNP configurations are needed instead. Evaluate the 200 mW per-transistor power dissipation limit against the expected load currents and ambient temperature conditions.
The PEMD13 belongs to the RET family of double transistors from Nexperia. It serves as the NPN/PNP complement to the PEMH13 (NPN/NPN) and PEMB13 (PNP/PNP). The device utilizes the SOT666 package, which offers a compact footprint suitable for high-density PCB layouts. This configuration allows designers to replace multiple discrete components with a single surface-mount device.
Direct functional equivalents include the PEMH13 for NPN/NPN needs and the PEMB13 for PNP/PNP needs within the same package family.