PEMD20,115

Overview

The PEMD20 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP transistor in an SOT666 package. It features built-in bias resistors R1 and R2, both nominally 2.2 kΩ. The device supports a collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 300 mW with a maximum junction temperature of 150 °C. The unit operates within an ambient temperature range of -65 °C to +150 °C.

Feature Summary

• Built-in bias resistors simplify circuit design
• Reduces component count and pick-and-place costs
• Ultra-small flat lead SMD plastic package

Applications

• Low current peripheral driver
• Control of IC inputs
• Replaces general-purpose transistors in digital applications

Procurement Notes

Verify the specific ordering suffix against the manufacturer's official database to confirm packaging details and availability status. Confirm that the product data sheet version matches the required revision for your design specifications. Ensure compliance with RoHS and REACH regulations as stated in the legal information section before finalizing procurement orders.

Selection Notes

Select this component when space constraints require a compact SOT666 footprint for dual transistor logic functions. Verify that the 2.2 kΩ internal bias resistor values align with the target drive currents and input voltage levels. Consider the 300 mW total power dissipation limit and thermal resistance characteristics for adequate heat management on the PCB.

Part Context

This part belongs to Nexperia's family of NPN/PNP resistor-equipped double transistors. Complementary variants include the PEMH20 for NPN/NPN configurations and the PEMB20 for PNP/PNP setups. All share similar ultra-small SOT666 packaging designed for high-density surface-mount assembly.

Replacement Considerations

Publicly confirmed substitute part numbers are not available in the provided documentation.