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The PEMD4,115 is a dual digital transistor from Nexperia, featuring one NPN and one PNP resistor-equipped transistor in an SOT-666 (SOT6) surface-mount package. It integrates built-in bias resistors to simplify circuit design and reduce component count. The device supports a collector-emitter voltage of 50 V and a continuous collector current of 100 mA. Typical input resistance is 10 kOhms. It operates within a temperature range of -65°C to +150°C with a maximum power dissipation of 300 mW. The part is marked as Not Recommended for New Designs (NRND).
Verify the Not Recommended for New Design (NRND) status before integration into new products. Confirm availability through authorized distributors as production may be limited. Check the latest datasheet revision for any updates to electrical characteristics or pin configurations prior to finalizing procurement orders.
Select this component when a compact solution for driving low-current loads or interfacing with logic inputs is required. Ensure the 50 V voltage rating and 100 mA current capacity meet the specific application requirements. Consider the SOT-666 package constraints for thermal management and PCB layout during the design phase.
This part belongs to the Nexperia digital transistor family, which combines bipolar junction transistors with internal biasing networks. These devices are designed to replace standard discrete transistors along with their associated base resistors, offering a more efficient assembly process and reduced bill of materials for digital switching applications.
Check for direct substitutes such as the PEMH24,115 or other NPN/PNP pairs in the same series. Verify that alternative parts match the 10 kOhm input resistance and SOT-666 footprint to ensure mechanical and electrical compatibility without redesigning the host circuit.