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The PEMD9,115 is a dual pre-biased NPN/PNP digital transistor manufactured by Nexperia. It integrates two transistors with built-in base resistors into a single surface-mount package to simplify circuit design and reduce component count. The device features a typical input resistance of 10 kOhms and a resistor ratio of 0.21. It supports a collector-emitter voltage (Vceo) of 50 V and a continuous collector current of 100 mA. Operating temperatures range from -65 °C to +150 °C. The component is available in the SOT363 (SC-88) package configuration.
Verify the specific ordering suffix against official Nexperia documentation to confirm package type and tape-and-reel specifications. Ensure that the requested variant matches the required electrical characteristics and RoHS compliance status before finalizing procurement orders.
Select this component when space-constrained designs require both NPN and PNP switching capabilities within a single footprint. The integrated resistor network eliminates external biasing components, reducing board area and assembly complexity compared to discrete transistor solutions.
This part belongs to the Nexperia PUMD series of pre-biased digital transistors. These devices are designed to replace multiple discrete components, offering a compact solution for high-density printed circuit board layouts while maintaining reliable switching performance across industrial temperature ranges.
Consult official Nexperia cross-reference guides for verified substitutes. Do not assume functional equivalence with generic dual transistors without verifying internal resistor values and pinout configurations.