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The PEMH10,115 is a dual NPN resistor-equipped transistor (RET) housed in an SOT666 surface-mount package. It integrates two NPN transistors with built-in bias resistors: R1 is nominally 2.2 kΩ and R2 is nominally 47 kΩ. The device supports a maximum collector-emitter voltage of 50 V and a continuous output current of 100 mA per transistor. Total power dissipation is rated at 300 mW for the device and 200 mW per transistor at 25 °C ambient temperature. The transition frequency reaches 230 MHz, and the DC current gain is typically 100 at 10 mA.
Verify the specific suffix '115' corresponds to the standard reel packing configuration defined in the ordering information. Confirm that the application does not require automotive qualification, as this product data sheet explicitly states the product is non-automotive qualified. Ensure thermal management aligns with the specified junction-to-ambient resistance values.
Select this component when a dual NPN configuration with integrated biasing is required. The nominal R1 value of 2.2 kΩ and R2 value of 47 kΩ are fixed; verify these ratios meet the specific input impedance requirements of the driving source. Consider the 50 V voltage rating and 100 mA current limit against the peak load conditions.
This part belongs to Nexperia's Resistor-Equipped Transistor (RET) family. It serves as the NPN/NPN complement to the PEMD10 (NPN/PNP) and PEMB10 (PNP/PNP). All variants share the same SOT666 physical footprint and pinout structure, differing only in internal transistor polarity and resistor values.
Direct functional replacements within the same series include PEMD10,115 and PEMB10,115. For single-transistor equivalents, PUMH10,115 offers a similar NPN RET configuration in the same package.