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PI3EQX10312ZHEX is listed in the Analog Switches - Special Purpose range at ChipApex. The manufacturer field lists Diodes Incorporated. Its product description is USB3 EQX V-QFN3590-42. Review the specifications below when checking this part for your BOM.
The PI3EQX10312 is a 10Gbps, 2-Port USB 3.1 Mux/Demux ReDriver with an integrated USB-C detector. It operates on a battery supply voltage of 3.0V to 5.5V and a dedicated 3.3V supply of 3.0V to 3.6V. The device supports I2C communication at frequencies up to 1000kHz and features selectable input termination between 50Ω to VDD, 75kΩ to VbiasRX, or 75kΩ to GND. Output termination options include 50Ω to VbiasTx, 6kΩ to VbiasTx, 75kΩ to VbiasTx, and 75kΩ to GND. Operating temperature ranges from -40°C to 70°C.
Verify the specific ordering suffix ZHEX corresponds to the 42-contact TQFN package in tape and reel format. Confirm compliance with RoHS directives and lead-free definitions prior to procurement. Check for product change notifications regarding manufacturing updates.
Select this component for designs requiring combined USB-C protocol handling and high-speed signal integrity maintenance. Ensure the system layout accommodates the 42-TQFN package dimensions and thermal pad requirements. Validate that the host controller supports the required I2C addressing scheme.
This part belongs to the PI3EQX10 series of interface signal buffers and repeaters manufactured by Diodes Incorporated. It is designed to extend the reach of high-speed serial links while managing power delivery negotiation through the integrated detector block.
The datasheet explicitly states the part is obsolete and directs users to use the PI3EQX10612 as the replacement.
The source current mode is set using the SRC_CUR pin or via I2C register bits. Valid configurations include Default (GND), 1.5A (No Connection), and 3A (VDD).
The USB-C Detector uses addresses CAh, 8Ah, EAh, or AAh depending on the ADDR1 resistor value. The ReDriver uses A4h, A0h, A6h, or A2h respectively.
Yes, the ReDriver can operate in Pin Control Mode where channel assignment and status are determined by the logic levels on the ADDR1, PORT1, and PORT0 pins.
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