PI3PCIE2612-AZFEX

Signal Buffers, Repeaters, Splitters Overview

The PI3PCIE2612-AZFEX is a high-bandwidth, six-differential channel one-to-two multiplexer/demultiplexer manufactured by Diodes Incorporated. It supports 5.0Gbps PCI Express Gen2 signals on one path and Display Port 1.1 signals on the second path. The device operates within a VDD range of 3.0V to 3.6V (nominal 3.3V) and functions between -40°C and +85°C. Key electrical parameters include a maximum bit-to-bit skew of 7ps, a maximum channel-to-channel skew of 35ps, and an insertion loss of -5.0dB at 5.0Gbps. It features low crosstalk (-35dB at 2.5GHz) and off-isolation (-35dB at 2.5GHz). The component is housed in a 56-contact TQFN package.

Signal Buffers, Repeaters, Splitters Feature Summary

• Supports simultaneous routing of PCIe Gen2 and DP 1.1 signals with matched paths for all PCIe signals.
• Features latched mux select control for stable signal path configuration.
• Provides low bit-to-bit and channel-to-channel skew to maintain signal integrity.
• Includes ESD tolerance of 8kV HBM on Display Port outputs and 3kV HBM on PCIe outputs.

Signal Buffers, Repeaters, Splitters Applications

• Routing Display Port and PCI Express Gen1 or Gen2 signals with low-signal attenuation.
• Next-generation systems combining PCI Express Gen2 signals with display port signals.
• High bandwidth graphics switching applications requiring ATX pinout compatibility.

Signal Buffers, Repeaters, Splitters Procurement Notes

Verify the ordering suffix 'X' indicates tape and reel packaging as specified in the datasheet. Confirm the 'E' suffix denotes lead-free and green compliance. Ensure the procurement matches the 56-TQFN package code ZF. Cross-reference the document number DS41684 Rev 1-2 for accurate specifications during sourcing.

Signal Buffers, Repeaters, Splitters Selection Notes

Select this component when designing systems that require switching between PCIe Gen2 and Display Port 1.1 signals. Ensure the design accommodates the 3.3V ±10% supply voltage. Verify that the application requires the specific 56-pin TQFN footprint. Consider the ESD protection levels if the interface connects directly to external connectors.

Signal Buffers, Repeaters, Splitters Part Context

This part belongs to the PI3PCIE series from Diodes Incorporated, specifically designed for high-speed video and data switching. It serves as a bridge for integrating PCIe and Display Port protocols in modern computing and graphics hardware. The device replaces older discrete switching solutions by providing integrated signal conditioning and routing in a compact form factor.

Signal Buffers, Repeaters, Splitters Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation. Designers should consult Diodes Incorporated for current alternatives if this specific ordering code becomes unavailable.

Signal Buffers, Repeaters, Splitters FAQ

What is the function of the SEL pin?

The SEL pin controls the multiplexer through a flow-through latch. A logic low selects the PCIe mode, while a logic high selects the Display Port mode.

How does the LE# pin operate?

The LE# pin controls the latch gate. When low, the device responds to changes on the SEL input. When high, the mux select state is latched and held constant.

What is the maximum operating temperature?

The maximum case temperature for operation within specification is +85°C.