PI6C20400HE

PI6C20400HE

  • Description:IC CLOCK BUFF DIFF 28-SSOP
  • Series:-

SKU:b566ec4deb98 Category: Brand:

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Product Detailed Parameters

  • Description:IC CLOCK BUFF DIFF 28-SSOP
  • Series:-
  • PLL:Yes
  • Mfr:Diodes Incorporated
  • Main Purpose:PCI Express (PCIe)
  • Input:HCSL
  • Output:HCSL
  • Number of Circuits:1
  • Ratio - Input:Output:1:04
  • Differential - Input:Output:Yes/Yes
  • Frequency - Max:100MHz
  • Voltage - Supply:3.135V ~ 3.465V
  • Operating Temperature:0°C ~ 70°C
  • Mounting Type:Surface Mount
  • Package / Case:28-SSOP (0.209", 5.30mm Width)
  • Supplier Device Package:28-SSOP
  • Grade:-
  • Qualification:-

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PI6C20400HE

Overview

The PI6C20400HE is a high-speed, low-noise differential clock buffer designed as a companion to the PI6C410B. It distributes a differential SRC clock from a synthesizer to four pairs of differential outputs in either PLL or fanout mode. The device operates on a single 3.3V supply (3.135V to 3.465V) and features an integrated programmable PLL with selectable bandwidth. Key electrical parameters include a maximum propagation delay of 6.5 ns in non-PLL mode, output-to-output skew under 50 ps, and cycle-cycle jitter under 50 ps. It utilizes HCSL-compatible inputs and outputs.

Feature Summary

  • Four pairs of differential clock outputs with low skew (<50ps) and low jitter (<50ps)
  • Programmable PLL bandwidth and selectable PLL or Fanout operation
  • SMBus interface for indexed block read/write control of outputs and configuration
  • Power management via PWRDWN# and SRC_STOP# pins for tristate control

Applications

  • Intel PCI Express chipset clock distribution
  • PCIe 1.0 and 2.0 compliant systems
  • High-speed data acquisition systems requiring precise clocking

Procurement Notes

Verify the package code 'HE' corresponds to the 28-pin SSOP form factor. Confirm RoHS compliance status through official manufacturer documentation. Ensure the specific revision level matches system requirements. Check for any PCN notices regarding component changes or obsolescence before finalizing procurement plans.

Selection Notes

Select this component when a 1:4 differential clock distribution with integrated PLL buffering is required for PCIe applications. Verify that the 3.3V supply voltage range aligns with the system design. Consider the SMBus control overhead if dynamic reconfiguration is needed. Ensure the thermal characteristics of the SSOP package are suitable for the intended operating environment.

Part Context

The PI6C20400 series belongs to Pericom's family of high-performance clock drivers. The 'HE' suffix specifically denotes the 28-pin SSOP package variant. This part is often paired with the PI6C410B clock synthesizer to form a complete clock generation and distribution solution for complex digital systems.

Replacement Considerations

The PI6C20400LE is a pin-compatible alternative offering the same functionality in a 28-pin TSSOP package. When substituting, verify that the PCB footprint accommodates the width difference between SSOP and TSSOP packages.

PI6C20400HEPI6C20400HE

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