PI6C557-03BLEX

Overview

The PI6C557-03BLEX is a PCIe 3.0 compliant spread spectrum clock generator manufactured by Diodes Incorporated. It features an integrated Phase-Locked Loop (PLL) and crystal driver, accepting a 25MHz input from a crystal or single-ended clock source. The device provides two differential HCSL outputs with selectable frequencies of 25MHz, 100MHz, 125MHz, or 200MHz via external pins. It supports LVDS-compatible voltage levels and offers spread spectrum modulation options of -0.5%, -0.75%, or no spread to reduce EMI. Operating on a 3.3V ±10% supply within the industrial temperature range (-40°C to +85°C), it utilizes a 16-pin TSSOP package.

Feature Summary

• PCIe 3.0 Compliant: Supports high-frequency RMS jitter as low as 0.45ps and cycle-to-cycle jitter of 35ps typical.
• Flexible Output Configuration: Generates differential HCSL outputs at 25MHz, 100MHz, 125MHz, or 200MHz; compatible with LVDS standards.
• Spread Spectrum Control: Selectable down-spread of -0.5% or -0.75%, or no spread, controlled via SS0/SS1 pins.
• Integrated PLL & Driver: Includes internal pull-ups for control pins and a precision current reference output (IREF).

Applications

• PCI Express (PCIe) Gen 3.0 systems requiring compliant clock generation.
• Ethernet applications needing spread spectrum clocking for EMI reduction.
• PC and embedded systems utilizing 25MHz crystal or clock inputs.

Procurement Notes

Verify the 'LEX' suffix indicates Lead-free/Green packaging and Tape/Reel delivery format per the datasheet ordering information. Confirm the specific die revision and assembly code markings match the required quality standards. Ensure the application design accounts for the 95mA operating supply current and proper decoupling capacitor placement near VDD pins.

Selection Notes

Select this component when PCIe 3.0 compliance and low jitter performance are required. Choose between HCSL and LVDS output termination based on the load requirements. Use the S0/S1 pins to configure the desired output frequency. Ensure the external crystal meets the recommended specifications (e.g., 25MHz, <300PPM error) for optimal PLL performance.

Part Context

This part belongs to the PI6C557-03B family of PCIe 3.0 clock generators. The 'L' suffix denotes the 16-pin TSSOP package, while 'E' signifies lead-free/green material composition. The 'X' suffix indicates tape and reel packaging. Other variants in the series include the QSOP package version (PI6C557-03BQEX).

Replacement Considerations

The PI6C557-03BQEX serves as a package alternative using the 16-pin QSOP form factor. Verify pinout compatibility and thermal characteristics when substituting packages. No other direct functional replacements are documented in the provided datasheet.