PI6ULS5V9517AWE

Signal Buffers, Repeaters, Splitters Overview

The PI6ULS5V9517AWE is a CMOS integrated circuit designed for I2C-bus and SMBus applications, functioning as a level translating repeater. It provides bidirectional buffering for serial data (SDA) and clock (SCL) lines across two channels. Port A operates with a supply voltage range of 0.8 V to 5.5 V, while Port B operates from 2.2 V to 5.5 V. The device supports Standard-mode and Fast-mode devices up to 400 kHz. It features an active HIGH enable input, open-drain outputs, and ESD protection exceeding 8 kV HBM. The WE suffix indicates the SOIC-8 package.

Signal Buffers, Repeaters, Splitters Feature Summary

• Provides bidirectional level translation between low voltage domains (down to 0.8 V) and higher voltage domains (2.2 V to 5.5 V).
• Supports arbitration and clock stretching across the repeater for mixed-mode I2C and SMBus systems.
• Features powered-off high-impedance pins to isolate bus segments during power-down states.
• Includes an active HIGH enable input to control repeater operation and prevent system hangs.

Signal Buffers, Repeaters, Splitters Applications

• Extending I2C bus capacitance limits by connecting multiple bus segments.
• Level shifting between low-voltage controllers and higher-voltage peripheral devices.
• Isolating bus sections in mixed-voltage embedded systems.

Signal Buffers, Repeaters, Splitters Procurement Notes

Verify the specific ordering suffix 'WE' corresponds to the SOIC-8 package when sourcing components. Confirm that the manufacturer has not designated this package type as 'Not Recommended for New Design' for current projects. Ensure compliance with RoHS and lead-free requirements specified in the datasheet notes before finalizing procurement specifications.

Signal Buffers, Repeaters, Splitters Selection Notes

Select this component when interfacing I2C buses with significantly different supply voltages, specifically where one side drops below 2.2 V. Ensure the application requires bidirectional buffering for both SDA and SCL lines. Verify that the operating frequency does not exceed the repeater's propagation delay limitations at the target speed.

Signal Buffers, Repeaters, Splitters Part Context

This part belongs to the PI6ULS5V9517 family of level translating repeaters manufactured by Diodes Incorporated. The base model PI6ULS5V9517 is available in MSOP-8, TDFN2x3-8, and SOIC-8 packages. The WE designation specifically identifies the SOIC-8 variant, which is noted by the manufacturer as not recommended for new designs compared to other package options.

Signal Buffers, Repeaters, Splitters Replacement Considerations

PI6ULS5V9517AZEEX (TDFN2x3-8 package)

Signal Buffers, Repeaters, Splitters FAQ

Can multiple PI6ULS5V9517A devices be connected in series?

Yes, multiple devices can be connected in series, provided that Port A of one device is connected to Port B of the next. This configuration allows for extended bus topologies limited only by timing constraints.

What happens if the EN pin changes state during an I2C bus operation?

Changing the EN pin state during an active bus cycle should be avoided. Disabling the repeater mid-operation can hang the bus, while enabling it partially through a cycle may confuse the connected I2C devices.

How does the device handle lock-up conditions?

The device is designed for lock-up free operation. Specifically, the Port B internal buffer maintains a buffered low level that prevents the input from recognizing its own output as a valid low, avoiding feedback loops.