PM41100B-FEI

Overview

The PM41100B-FEI is a high-performance, non-blocking Gen4 programmable PCIe switch supporting up to 100 lanes and 52 ports. It features 26 virtual switch partitions and 48 Non-Transparent Bridges (NTBs). The device operates at PCIe Gen4 speeds of 16 GT/s with flexible port bifurcation options including x1, x2, x4, x8, and x16 configurations. It integrates an enclosure management processor, advanced error containment mechanisms such as AER and DPC, and comprehensive diagnostics including real-time eye capture.

Feature Summary

• Integrates an internal MIPS processor for enclosure management firmware development and system control.
• Supports logical Non-Transparent interconnects allowing larger topologies with up to 48 assignable NTBs per port.
• Provides robust error containment through Downstream Port Containment (DPC), Completion Timeout Synthesis (CTS), and Upstream Error Containment (UEC).
• Includes NVMe-MI enclosure management capabilities with integrated NVMe controller and support for in-band and out-of-band management protocols.

Applications

• PCIe SSD enclosures and Flash arrays requiring high-density storage connectivity.
• Multi-host architectures and pooled storage/compute systems needing flexible partitioning.
• High-reliability applications demanding hot-plug controllers and advanced error containment.
• Blade servers and high-density server environments utilizing PCIe Gen4 bandwidth.

Procurement Notes

Verify the specific ordering suffix against official Microchip documentation to confirm package type, temperature range, and lead time requirements. Ensure compatibility with the PSX Software Development Kit (SDK) if custom enclosure management or error handling logic is required for the design implementation.

Selection Notes

Select this component when designing systems requiring up to 100 lanes of PCIe Gen4 connectivity with extensive port flexibility. Consider the integrated MIPS processor and NVMe-MI features if enclosure management functions are needed without external controllers. Evaluate the 26 virtual switch partitions and 48 NTBs for complex topology requirements.

Part Context

This part belongs to the Switchtec PSX Gen4 Programmable PCIe Switch Family, which includes variants like PM41084 and PM41068. These switches are designed for high-reliability data center solutions, offering significant power and board space savings compared to traditional switching architectures while maintaining high throughput.

Replacement Considerations

Direct replacements within the same family include PM41084B-FEI (84 lanes) and PM41068B-FEI (68 lanes). Verify pinout and software compatibility before substitution, as lane counts and port configurations differ across the PSX Gen4 series.

FAQ

What is the maximum number of Non-Transparent Bridges (NTBs) supported by the PM41100B-FEI?

The PM41100B-FEI supports up to 48 NTBs that can be assigned to any port within the switch architecture.

Does the PM41100B-FEI support hot-plugging?

Yes, the device includes hot- and surprise-plug controllers for each of its 52 ports to ensure reliable connection management.

What diagnostic tools are integrated into the PM41100B-FEI?

It features real-time eye capture, external loopback capability, per-port performance counters, error statistics, and access to configuration data via ChipLink Diagnostic Tools.