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The PQMD10 is an NPN/PNP double Resistor-Equipped Transistor (RET) housed in a leadless DFN1010B-6 (SOT1216) package. It integrates two transistors with built-in bias resistors, specifically R1 at 2.2 kΩ and R2 at 47 kΩ. The device supports a maximum collector-emitter voltage of 50 V and an output current capability of 100 mA per transistor. Operating temperatures range from -55 °C to +150 °C ambient, with a junction temperature limit of 150 °C. Total power dissipation is rated at 350 mW per device at 25 °C ambient. The package height is 0.37 mm.
Verify the specific ordering suffix against the manufacturer's official documentation to ensure correct packaging configuration. Confirm that the DFN1010B-6 package dimensions align with the target PCB footprint requirements. Ensure design margins respect the absolute maximum ratings for voltage and power dissipation under expected operating conditions.
Select this component when space constraints require a dual-transistor solution with integrated biasing. The low profile and small footprint make it suitable for dense layouts. Verify that the required base drive currents are compatible with the fixed 2.2 kΩ input resistor value. Consider thermal derating if the ambient temperature exceeds 25 °C.
This device belongs to the PQMD series of Resistor-Equipped Transistors manufactured by Nexperia. It provides a compact alternative to discrete transistor pairs, simplifying circuit design by eliminating external biasing components. The DFN1010B-6 package offers enhanced thermal performance relative to its size compared to traditional plastic packages.
The PQMH10 is documented as the NPN/NPN complement to the PQMD10. Verify pinout compatibility and electrical characteristics before substituting with other RETs from different manufacturers.