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The PQMD10 is an NPN/PNP double Resistor-Equipped Transistor (RET) housed in a leadless DFN1010B-6 (SOT1216) package. It integrates two transistors with built-in bias resistors: R1 at 2.2 kΩ and R2 at 47 kΩ. The device supports a collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Key electrical characteristics include a DC current gain (hFE) of 100 minimum, a transition frequency up to 230 MHz for the NPN side, and a total power dissipation of 350 mW. The component is AEC-Q101 qualified for automotive use.
Verify the specific ordering suffix against the manufacturer's latest documentation to ensure correct packaging and tape-and-reel specifications. Confirm that the DFN1010B-6 footprint matches your PCB design guidelines. Check for any recent revision history updates that may affect soldering profiles or marking codes before finalizing procurement orders.
Select this component when designing compact circuits requiring both NPN and PNP switching capabilities with integrated base drive resistors. Ensure the required collector current does not exceed 100 mA and the voltage ratings remain within 50 V limits. Consider the thermal resistance values if operating near maximum power dissipation limits in free air or on FR4 substrates.
This part belongs to Nexperia's family of resistor-equipped transistors designed to simplify digital circuit layouts. It serves as a complement to other RET models like the PQMH10. The dual-transistor configuration allows for efficient level shifting or push-pull driving in minimal board space compared to discrete transistor pairs.
Direct functional substitutes must match the NPN/PNP configuration, 2.2 kΩ/47 kΩ resistor values, and DFN1010B-6 package dimensions. Verify pinout compatibility and electrical parameters such as VCEO and hFE before substitution. Cross-reference with Nexperia's official replacement guide for validated alternatives.
The input bias resistor (R1) is 2.2 kΩ, and the ratio resistor (R2) is 47 kΩ.
Yes, the PQMD10 is qualified according to the AEC-Q101 standard for discrete semiconductors.
The maximum collector-emitter voltage (VCEO) is 50 V for both the NPN and PNP transistors.