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The PS11011 is a flat-base insulated Application Specific Intelligent Power Module (ASIPM) by Mitsubishi Semiconductor. It integrates a 3-phase AC-to-DC converter bridge, an inverter bridge using 3rd generation IGBTs and diodes, and a dynamic braking circuit. The module provides integrated drive, protection, and system control functions for the upper-leg, lower-leg, and brake IGBTs. Key electrical parameters include a 600V collector-emitter voltage rating, a continuous output current capability of 0.8A RMS at 100% load, and a 25A DC output current for the rectifier section. It features short-circuit protection, under/over-voltage lockout, over-temperature protection, and analogue current feedback.
Verify component authenticity through authorized distributors or direct manufacturer channels. Confirm datasheet revision status to ensure compatibility with specific application requirements. Check isolation voltage ratings and thermal resistance values against system design constraints. Ensure mounting torque specifications are strictly followed during installation to maintain thermal performance and mechanical integrity.
Select this module for low-power 3-phase motor drives requiring integrated intelligence. Evaluate thermal management needs based on the specified junction-to-case thermal resistance. Ensure the control logic operates within the 5V CMOS/TTL input thresholds. Verify that the 600V blocking voltage meets the DC bus requirements of the target inverter topology.
This component belongs to the ASIPM family from Mitsubishi Semiconductor, designed to simplify inverter designs by combining power switching and control electronics. It utilizes 3rd generation IGBT technology to enhance efficiency and switching speed. The flat-base insulated package facilitates direct mounting to heat sinks while providing necessary electrical isolation for safety compliance in industrial environments.
Public confirmed substitute part numbers: None available in verified documentation.
The module includes an input interlocking protection circuit that cuts off both upper and lower IGBTs if simultaneous LOW level signals are detected, outputting an FO signal to indicate the fault.
The FO1 output is reset by the high-to-low going edge of either an upper-leg or lower-leg input signal, whichever occurs later after the fault condition.
Yes, due to the integrated HVIC, direct coupling to a CPU without opto or transformer isolation is possible, provided the interface circuits follow the recommended CMOS/TTL compatibility guidelines.