PSD813F1A-12JI

Overview

The PSD813F1A is a programmable microcontroller peripheral IC designed for 8-bit MCUs, operating on a single 5 V supply. It integrates 1 Mbit of primary Flash memory and 256 Kbit of secondary EEPROM, supporting concurrent read/write operations between the two arrays. The device includes 16 Kbit of SRAM and over 3,000 gates of programmable logic (DPLD and CPLD). It features 27 reconfigurable I/O pins and an enhanced JTAG serial port for in-system programming. The component supports page registers to expand address space and offers high endurance with 100,000 Flash erase/write cycles.

Feature Summary

• Dual bank memory architecture: 1 Mbit Primary Flash and 256 Kbit Secondary EEPROM allow simultaneous code execution and data logging.
• Integrated programmable logic: Over 3,000 gates comprising Decode PLD (DPLD) and Complex PLD (CPLD) with 16 Output Macrocells.
• In-System Programmability: Built-in IEEE 1149.1 compliant JTAG interface enables full-chip programming without MCU participation.
• Reconfigurable I/Os: 27 individually configurable pins support multiple modes including MCU I/O, PLD I/O, and latched address outputs.

Applications

• 8-Bit MCU Peripherals
• Embedded system designs requiring field firmware updates via In-Application Programming (IAP)
• Systems needing simplified CPU peripheral circuit design and reduced board volume

Procurement Notes

Verify that the specific ordering suffix corresponds to the required package type, as the PSD813F1A family is available in PQFP52, PLCC52, and TQFP64 packages. Confirm that the application design accounts for the 'Not Recommended for New Designs' status indicated in the documentation revision history. Ensure compatibility with the 5 V ± 10% supply voltage requirement during integration.

Selection Notes

Select this component when designing with 8-bit microcontrollers that require external memory and logic consolidation. The dual-bank memory structure is essential for applications demanding In-Application Programming (IAP) where code execution must continue during memory erasure or programming. Verify that the target MCU bus interface (multiplexed or non-multiplexed) aligns with the PSD's connection capabilities.

Part Context

The PSD813F1A belongs to the PSD (Programmable System Device) family developed by STMicroelectronics. This series integrates Flash memory, EEPROM, SRAM, and programmable logic into a single chip to replace discrete peripheral components like address latches and PLDs. The device facilitates 'no glue' connections between the MCU and peripherals, significantly reducing system complexity and development time.

Replacement Considerations

Public confirmed substitute part numbers are not provided in the source material. Designers should consult official STMicroelectronics documentation for legacy replacement strategies or cross-reference with other members of the PSD813 series if pinout and feature compatibility permits.