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The Nexperia PUMB10 is a PNP/PNP Resistor-Equipped Double Transistor (RET) housed in a SOT363-3 (SC-88/TSSOP6) surface-mounted package. It features built-in bias resistors with R1 at 2.2 kΩ and R2 at 47 kΩ, providing a typical ratio of 21. The device supports a collector-emitter voltage (VCEO) of -50 V and a continuous output current (IO) of -100 mA per transistor. Total power dissipation reaches 300 mW for the dual device at 25 °C ambient temperature. It operates within a junction temperature range of -65 °C to +150 °C and includes AEC-Q101 qualification.
Verify the specific ordering suffix against the manufacturer's official documentation before procurement. Confirm that the requested variant matches the standard PUMB10 specifications regarding resistor values and package type. Ensure compliance with automotive qualification requirements if deploying in vehicle systems. Cross-reference marking codes to validate manufacturing origin. Review the latest product data sheet for any recent revisions or changes to the package outline.
Select the PUMB10 when a compact dual PNP solution with integrated biasing is required. The fixed 2.2 kΩ input resistor and 47 kΩ feedback resistor suit standard logic interface levels. Consider the -50 V rating for low-voltage switching tasks. Evaluate thermal performance based on the 300 mW total dissipation limit. Verify compatibility with existing PCB footprints designed for the SOT363-3 package.
The PUMB10 belongs to Nexperia's family of Resistor-Equipped Double Transistors (RETs). It serves as the PNP/PNP complement to the PUMD10 (NPN/PNP) and PUMH10 (NPN/NPN). This series consolidates discrete transistor and resistor networks into single packages to minimize board space. The device replaces multiple individual components in digital switching circuits.
Direct functional equivalents include the PUMD10 for NPN/PNP configurations and PUMH10 for NPN/NPN setups. Check datasheets for matching resistor tolerances and current ratings when substituting.