PUMB11/ZLF

Overview

The PUMB11 is a dual PNP resistor-equipped transistor (RET) housed in a TSSOP6 (SOT363-3) surface-mounted package. It integrates two PNP transistors with built-in bias resistors, where R1 and R2 are nominally 10 kΩ each. The device supports a collector-emitter voltage (VCEO) of -50 V and a continuous output current (IO) of -100 mA per transistor. Total power dissipation is rated at 300 mW for the device at 25 °C ambient temperature. Key electrical characteristics include a DC current gain (hFE) of at least 30 at -5 mA/-5 V, a saturation voltage (VCEsat) of -100 mV maximum at -10 mA/-0.5 mA base current, and a transition frequency (fT) of 180 MHz typical.

Feature Summary

• Integrates dual PNP transistors with fixed internal bias resistors to reduce external component count.
• Designed for simplified circuit design and reduced pick-and-place costs in surface-mount applications.
• Provides low collector-emitter saturation voltage for efficient switching performance.

Applications

• Low current peripheral drivers
• Control of IC inputs
• Replacement for general-purpose transistors in digital applications

Procurement Notes

Verify the specific ordering suffix against the manufacturer's current catalog to ensure correct packaging and marking codes. Confirm RoHS compliance status and moisture sensitivity level requirements prior to procurement. Ensure the selected variant matches the required thermal and electrical specifications for the target application environment.

Selection Notes

Select this component when space-constrained designs require dual PNP switching with integrated biasing. Verify that the 10 kΩ internal resistor values align with the driving logic levels and desired operating currents. Consider the 300 mW total power dissipation limit and thermal resistance characteristics when designing the PCB footprint and heat dissipation strategy.

Part Context

The PUMB11 belongs to Nexperia's family of Resistor-Equipped Transistors (RETs). It serves as the PNP/PNP configuration within this series, complemented by NPN/NPN variants like the PUMH11 and NPN/PNP combinations such as the PUMD3. These devices are designed to replace discrete transistor-resistor networks in compact surface-mount layouts.

Replacement Considerations

Direct functional substitutes within the same package and specification range include the PUMH11 for NPN/NPN configurations or other RETs from the same family if polarity differences are accommodated. Verify pinout compatibility and resistor values before substitution.

FAQ

What are the nominal values of the built-in bias resistors?

Both bias resistors, R1 (input) and R2, have a nominal value of 10 kΩ.

What is the maximum collector-emitter voltage rating?

The maximum collector-emitter voltage (VCEO) is -50 V.

How is the device packaged?

The PUMB11 is available in a TSSOP6 plastic surface-mounted package, also known as SOT363-3.