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The PUMB1,135 is a digital transistor array manufactured by Nexperia USA Inc., housed in a 6-TSSOP surface-mount package. It integrates one NPN and one PNP transistor with pre-biased resistors. The device supports a maximum collector current of 100 mA and withstands a collector-emitter voltage (VCEO) of 50 V. Key electrical parameters include a minimum DC current gain (hFE) of 100 at 10 mA and 5 V, and a maximum collector-base voltage (VCBO) of 50 V. The total power dissipation is rated at 300 mW, with an operating temperature range from -65°C to +150°C.
Verify the specific suffix against official Nexperia documentation to confirm packaging configuration, as suffixes indicate reel or cut-tape variations. Ensure the requested variant matches the required tape and reel specifications for automated assembly lines. Cross-reference the manufacturer part number with authorized distributor catalogs to confirm availability and compliance with RoHS directives before finalizing procurement orders.
Select this component when space-constrained designs require both NPN and PNP switching capabilities within a single SOT-363 compatible footprint. Evaluate the 100 mA current rating and 50 V voltage limits against circuit load requirements. Consider the integrated resistor values for base drive compatibility with standard logic outputs to minimize external component count and simplify schematic design.
This part belongs to the PUMB series of digital transistors, which combine bipolar junction transistors with internal biasing networks. The PUMB1 variant specifically pairs an NPN resistor-equipped transistor with a PNP general-purpose transistor. This integration replaces discrete components, reducing board space and simplifying assembly processes in modern electronic devices.
Publicly confirmed substitute part numbers are not available in the provided source material. Verify pinout compatibility and electrical parameter equivalence with alternative manufacturers if sourcing directly from Nexperia is not feasible.