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The PUMB13,115 is a PNP/PNP resistor-equipped double transistor (RET) manufactured by Nexperia USA Inc. It integrates two PNP transistors with built-in bias resistors in a TSSOP6 (SOT363-3) surface-mount package. Key electrical parameters include a collector-emitter voltage of -50 V and an output current capability of -100 mA per transistor. The internal bias network consists of R1 at 4.7 kΩ and R2 at 47 kΩ, yielding a nominal ratio of 10. Total power dissipation reaches 300 mW for the device at 25 °C ambient temperature. The component operates within an ambient temperature range of -65 °C to +150 °C.
Verify the specific ordering suffix matches the required tape-and-reel or cut-tape configuration before purchase. Confirm that the SOT363-3 package variant aligns with the PCB footprint requirements. Ensure the supply chain source provides valid traceability documentation consistent with Nexperia standards.
Select this component when a dual PNP configuration with integrated base resistors is required. Verify that the 4.7 kΩ input resistance meets the driving source limitations. Check thermal derating curves if operating near the maximum junction temperature limit of 150 °C.
This part belongs to the PUM series of Resistor-Equipped Transistors. The PUMD13 serves as the NPN/PNP complement, while the PUMH13 is the NPN/NPN equivalent. All variants share similar pinning and package dimensions but differ in transistor polarity and internal resistor configurations.
Direct substitutes include the PEMB13 from previous manufacturing iterations. Verify compatibility with the updated SOT363-3 package designation replacing the legacy SOT363 outline.