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The PUMB18,115 is a dual PNP resistor-equipped transistor (RET) manufactured by Nexperia USA Inc. It integrates two PNP transistors with built-in bias resistors into a single SOT-363 (SC-88) surface-mounted package. The device features a collector-emitter voltage (VCEO) of -50 V and a continuous output current (IO) of -100 mA per transistor. The typical input bias resistor (R1) is 4.7 kΩ, with a bias resistor ratio (R2/R1) of 2.1. Total power dissipation is rated at 200 mW per transistor and 300 mW for the entire device at an ambient temperature of 25 °C. The component operates within a junction temperature range of -65 °C to +150 °C.
Verify the specific ordering suffix
Select the PUMB18 when space-constrained designs require dual PNP switching with integrated biasing. Ensure the required collector current does not exceed 100 mA and that the -50 V voltage rating accommodates the circuit's maximum operating conditions. Verify thermal management requirements against the 200 mW per-transistor dissipation limit.
The PUMB18 belongs to the PEMB18/PUMB18 family of PNP resistor-equipped transistors. While the PEMB18 utilizes the larger SOT-666 package, the PUMB18 employs the smaller SOT-363 (SC-88) footprint. Both variants share identical electrical characteristics, including the 4.7 kΩ input resistor and 50 V voltage rating, allowing for pin-compatible or functionally equivalent design choices based on available PCB real estate.
Publicly confirmed substitute part numbers are not provided in the source documentation. Designers should consult official Nexperia replacement guides or datasheets for cross-reference information.
The marking code for the PUMB18 is B8*, where * represents a placeholder for the manufacturing site code.
Yes, the product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101.
Reflow soldering is the only recommended soldering method for the PUMB18.