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The PUMB19,115 is a dual PNP resistor-equipped transistor array housed in a SOT363 (SC-88) surface-mount package. It integrates two independent PNP transistors with built-in bias resistors, where R1 is nominally 22 kΩ and R2 is open. The device supports a maximum collector-emitter voltage of -50 V and a continuous DC output current of -100 mA per transistor. Total power dissipation is rated at 300 mW at an ambient temperature of 25 °C. Key electrical characteristics include a minimum DC current gain (hFE) of 100 at -1 mA collector current and a maximum collector-emitter saturation voltage of -150 mV at -10 mA.
Verify the specific ordering suffix to confirm packaging type, as the base part number PUMB19 corresponds to the SOT363 package. Confirm that the -115 suffix indicates standard taping (T1) on an 8 mm tape and reel with a packing quantity of 3000 units. Ensure compatibility with reflow soldering methods specified in the thermal characteristics section.
Select this component when a dual PNP configuration with fixed biasing is required. The 22 kΩ input resistor value determines the base drive current; verify that this resistance provides adequate base current for the intended load while staying within the maximum ratings. Consider the 300 mW total power dissipation limit when designing for high ambient temperatures or dense PCB layouts.
This component belongs to the PUMB series of NPN/PNP resistor-equipped transistors manufactured by Nexperia. It serves as the PNP counterpart to the PUMD series. The device is designed for surface-mount assembly, offering a compact footprint compared to discrete transistor and resistor combinations. It is part of a broader family including PEMB19 variants in different packages.
PEMB19
The second bias resistor (R2) is open, meaning it is not connected internally.
The maximum junction temperature is 150 °C.
The SOT363 package has 6 leads.