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The PUMB2/DG/B3,115 is a dual Resistor-Equipped Transistor (RET) manufactured by Nexperia. It integrates one NPN and one PNP transistor within a single SOT363 surface-mount package. The device features built-in bias resistors with typical values of 47 kΩ for both the NPN base resistor (R1) and the PNP base resistor (R2). Key electrical ratings include a maximum collector-emitter voltage (VCEO) of 50 V and a continuous collector current (IC) of 100 mA. The component operates within a temperature range from -65°C to +150°C and has a total power dissipation capability of 200 mW.
Verify the specific suffix DG/B3 against the official Nexperia datasheet to confirm pinout and internal configuration match your schematic requirements. Ensure the ordering code aligns with the desired packaging format, such as cut tape or reel, as specified in the procurement documentation. Cross-reference the manufacturer part number with authorized distributor listings to ensure authenticity and traceability.
Select this component when space constraints require combining two transistors into one package. The integrated bias resistors eliminate external components, reducing assembly costs. Verify that the 50 V voltage rating and 100 mA current capacity meet the load requirements. Consider the SOT363 thermal characteristics for power dissipation limits in the final enclosure design.
This part belongs to the Nexperia PUM series of dual resistor-equipped transistors. These devices are designed to replace multiple discrete components, offering a solution for high-density circuit designs. The SOT363 package allows for efficient use of board real estate in portable and mobile applications where size and weight are critical factors.
Publicly confirmed substitute part numbers are not available in the provided source material. Engineers should consult the official Nexperia replacement guide or contact technical support for qualified alternatives.