PUMB2,115

Overview

The PUMB2,115 is a dual pre-biased NPN transistor array manufactured by Nexperia USA Inc. It integrates two PNP transistors with integrated base and emitter resistors in a compact surface-mount package. The device features a collector-emitter breakdown voltage of 50V and a maximum continuous collector current of 100mA per element. Each transistor includes a 47 kOhm base resistor (R1) and a 47 kOhm emitter resistor (R2). The component is housed in a 6-TSSOP (SC-88/SOT-363) package, offering a maximum power dissipation of 300mW. It operates within a temperature range of -65°C to +150°C.

Feature Summary

• Dual configuration integrating two PNP digital transistors with built-in biasing resistors for simplified circuit design.
• High-voltage capability with a 50V collector-emitter breakdown rating suitable for various logic interface applications.
• Compact surface-mount packaging designed for automated assembly and space-constrained PCB layouts.

Applications

• Logic level shifting between different voltage domains in embedded systems.
• Driver circuits for low-current loads such as LEDs or relay coils.
• Pull-up/pull-down implementations in digital communication interfaces.

Procurement Notes

Verify the specific suffix and tape-and-reel specifications against the manufacturer's latest datasheet before ordering. Confirm that the 6-TSSOP footprint matches the target PCB land pattern. Ensure compliance with RoHS3 directives if required by the end product regulations. Check for any recent PCN updates regarding labeling or assembly changes.

Selection Notes

Select this component when a dual PNP pre-biased solution is required with 50V blocking capability. The integrated 47kOhm resistors simplify base drive calculations compared to discrete BJT arrangements. Consider the 300mW power dissipation limit and thermal management requirements for the SOT-363 package during high-duty-cycle operations.

Part Context

This part belongs to the PUMB series of pre-biased bipolar junction transistor arrays from Nexperia. These devices are engineered to replace multiple discrete components, reducing board space and assembly costs. The PUMB2 variant specifically provides a dual PNP configuration, distinct from single-transistor or mixed NPN/PNP alternatives in the same family.

Replacement Considerations

Publicly confirmed substitute part numbers were not identified in the provided source material. Engineers should consult official cross-reference tools or manufacturer documentation for verified equivalents.