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The PUMB3,115 is a dual pre-biased bipolar junction transistor (BJT) array manufactured by Nexperia USA Inc. It integrates one NPN and one PNP transistor within a single surface-mount package. The device features a maximum collector-emitter voltage of 50V and a continuous collector current rating of 100mA. Internal bias resistors are configured with R1 at 4.7 kΩ and R2 at 47 kΩ. The component operates with a maximum power dissipation of 300mW and utilizes a 6-TSSOP (SC-88/SOT-363) package for compact circuit integration.
Verify the specific ordering suffix against official Nexperia documentation to confirm pinout compatibility and internal resistor values. Ensure the selected packaging format matches the intended automated assembly process requirements. Cross-reference the manufacturer part number with authorized distributor catalogs to validate current production status and availability.
Select this component when a complementary NPN/PNP pair is required in a minimal footprint. Verify that the integrated 4.7 kΩ and 47 kΩ resistor values align with the target drive current and logic level requirements. Confirm that the 50V breakdown voltage and 100mA current limits exceed the maximum operational stresses of the application circuit.
This part belongs to the Nexperia PUM series of resistor-equipped transistors. These devices are designed to replace multiple discrete components, thereby reducing printed circuit board area and assembly costs. The series offers various configurations of NPN and PNP combinations with standardized resistor networks for common digital switching applications.
Compatible substitutes include other Nexperia dual pre-biased arrays such as the PUMD3 or PUMH11 series, provided the internal resistor ratios and transistor polarities match the original circuit design requirements.