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The Nexperia PUMD10 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP bipolar junction transistor in a SOT363-3 package. It features built-in bias resistors with R1 at 2.2 kΩ and R2 at 47 kΩ. The device supports a maximum collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 200 mW per transistor and 300 mW for the device, with a junction temperature limit of 150 °C. Transition frequencies are specified at 230 MHz for the NPN section and 180 MHz for the PNP section.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm package version and marking codes. Confirm RoHS compliance status and moisture sensitivity level requirements prior to procurement. Ensure the selected variant matches the required thermal characteristics for the intended operating environment.
Select this component when space-constrained designs require integrated biasing for both NPN and PNP switching functions. Evaluate the total power dissipation limits relative to ambient temperature conditions. Consider the transition frequency specifications if high-speed signal switching is required for the application.
The PUMD10 belongs to the PUMD series of resistor-equipped double transistors manufactured by Nexperia. It serves as the NPN/PNP complement to the PUMB10 (PNP/PNP) and PUMH10 (NPN/NPN) variants within the same product family. All devices share similar electrical characteristics and utilize the SOT363-3 plastic surface-mounted package.
MUN5335DW1T1G from onsemi is listed as a direct substitute.