PUMD10,115

Overview

The PUMD10,115 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP transistor in a SOT363-3 package. It features built-in bias resistors with R1 = 2.2 kΩ and R2 = 47 kΩ. The device supports a collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 300 mW for the device and 200 mW per transistor at 25 °C ambient temperature. Transition frequencies are 230 MHz for the NPN section and 180 MHz for the PNP section.

Feature Summary

• Integrates NPN and PNP transistors with built-in bias resistors to reduce component count
• Simplifies circuit design by eliminating external base drive components
• Reduces pick and place costs through compact surface-mount packaging

Applications

• Low current peripheral driver
• Control of IC inputs
• Replaces general-purpose transistors in digital applications

Procurement Notes

Verify the specific ordering suffix matches the required tape and reel configuration. Confirm the package version corresponds to SOT363-3 as specified in the latest product data sheet revision. Ensure compatibility with standard reflow soldering profiles for the TSSOP6 outline dimensions provided in the official documentation.

Selection Notes

Select this component when space constraints require a combined NPN/PNP solution with fixed bias ratios. Verify that the 2.2 kΩ input resistor and 47 kΩ feedback resistor values align with the target logic levels. Check thermal derating curves if operating near the 300 mW total dissipation limit on FR4 PCBs.

Part Context

This part belongs to the Nexperia PUMD10 family of double Resistor-Equipped Transistors. It serves as the complementary pair to the PUMB10 (PNP/PNP) and PUMH10 (NPN/NPN) variants within the same SOT363-3 footprint. The series is designed for cost-effective digital switching applications requiring minimal external components.

Replacement Considerations

Direct substitutes include other RET devices with matching NPN/PNP configurations and similar bias resistor values. Verify pinout compatibility and thermal resistance characteristics before substitution.