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The PUMD10,135 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP transistor in a SOT363-3 package. It features built-in bias resistors with R1 = 2.2 kΩ and R2 = 47 kΩ. The device supports a collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is limited to 200 mW per transistor and 300 mW per device at 25 °C ambient temperature. Transition frequencies are 230 MHz for the NPN section and 180 MHz for the PNP section.
Verify the specific ordering suffix matches the required packaging configuration before procurement. Confirm that the SOT363-3 package variant aligns with the target PCB footprint requirements. Ensure environmental compliance standards meet project specifications. Cross-reference the manufacturer's latest documentation for any recent changes to marking codes or assembly details.
Select this component when space constraints require a compact dual-transistor solution with integrated biasing. The 50 V rating and 100 mA current capacity suit low-power switching tasks. Consider the thermal resistance characteristics if operating near maximum power limits. Verify compatibility with existing digital logic levels using the provided input voltage specifications.
The PUMD10 belongs to Nexperia's family of resistor-equipped double transistors designed for digital applications. It serves as a compact alternative to discrete NPN/PNP pairs. Complementary variants include the PUMB10 for PNP/PNP configurations and the PUMH10 for NPN/NPN setups. The device utilizes the SOT363-3 package to minimize board area while maintaining electrical performance.
Publicly confirmed substitute part numbers include MUN5335DW1T1G from onsemi and DCX123JU-7-F from Diodes Incorporated.