PUMD12,115

Overview

The PUMD115,115 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP transistor in a SOT363 (SC-88) plastic surface-mounted package. It features built-in bias resistors R1 and R2, both nominally 47 kΩ. The device supports a collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 200 mW per transistor and 300 mW for the entire device at 25 °C ambient temperature. The component is qualified to AEC-Q101 standards for automotive applications.

Feature Summary

• Integrates NPN and PNP transistors with built-in bias resistors to reduce component count
• AEC-Q101 qualified for automotive reliability requirements
• SOT363 package design replaces two separate SOT323 devices on the same PCB area

Applications

• Low current peripheral driver circuits
• Control of IC inputs
• Replaces general-purpose transistors in digital applications

Procurement Notes

Verify the specific ordering suffix matches the required packing method, as the -115 designation corresponds to a 4 mm pitch, 8 mm tape and reel configuration. Confirm that the SOT363 package variant aligns with the target PCB footprint specifications before finalizing procurement orders.

Selection Notes

Select this component when space constraints require replacing two discrete transistors with a single surface-mount device. Ensure the circuit design accommodates the fixed 47 kΩ internal bias resistors and verify that the 50 V collector-emitter voltage rating meets the system's maximum operating conditions.

Part Context

This part belongs to the Nexperia PEMD12/PUMD12 family of NPN/PNP resistor-equipped transistors. While functionally similar to the PEMD12, the PUMD12 utilizes the smaller SOT363 package instead of the SOT666, offering a more compact solution for high-density board layouts.

Replacement Considerations

The PEMD12 serves as a functional equivalent but utilizes the larger SOT666 package. Direct pin-to-pin replacement requires verifying that the target PCB footprint can accommodate the physical dimensions of the alternative package type.