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The Nexperia PUMD13-Q is an NPN/PNP Resistor-Equipped Transistor (RET) housed in a SOT363-3 (SC-88) surface-mount package. It integrates one NPN and one PNP transistor with built-in bias resistors, specifically R1 at 4.7 kΩ and R2 at 47 kΩ. The device supports a maximum collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 200 mW per transistor and 300 mW for the entire device at 25 °C ambient temperature. Transition frequencies reach 230 MHz for the NPN section and 180 MHz for the PNP section.
Verify the specific ordering suffix to confirm packaging configuration, as standard quantities vary by manufacturer designation. Confirm that the AEC-Q101 qualification aligns with target automotive application requirements before finalizing procurement plans.
Select this component when space constraints require integrated biasing solutions. Ensure the 50 V breakdown voltage and 100 mA current limits accommodate the specific load requirements. Verify thermal management capabilities against the 200 mW per-transistor dissipation rating under expected operating conditions.
This part belongs to the PUMD13 family of resistor-equipped double transistors. It shares functional similarities with other RETs like the NHUMD13 but differs in voltage ratings and specific resistor values. The Q-suffix indicates automotive-grade qualification distinct from standard commercial variants.
Publicly confirmed substitute part numbers are not available in the provided documentation. Designers should consult official Nexperia resources for validated cross-references.