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The Nexperia PUMD13,115 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP transistor in a SOT363-3 package. It features built-in bias resistors with R1 at 4.7 kΩ and R2 at 47 kΩ. The device supports a maximum collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 300 mW for the device and 200 mW per transistor at 25 °C ambient temperature. The junction temperature range extends from -65 °C to 150 °C.
Verify the specific ordering suffix matches the required tape and reel configuration. Confirm that the SOT363-3 package variant aligns with the PCB footprint specifications. Ensure compliance with RoHS and REACH regulations for the target market. Check the most recent datasheet revision to confirm active production status before finalizing procurement plans.
Select this component when space constraints require a dual transistor solution with integrated biasing. The 50 V rating suits low-voltage logic interfacing tasks. Verify that the 100 mA current capability meets the load requirements. Consider the thermal resistance characteristics if operating near the upper temperature limits.
This part belongs to the PUMD13 family of resistor-equipped double transistors. Complementary configurations include the PUMB13 for PNP/PNP pairs and the PUMH13 for NPN/NPN pairs. All variants share similar electrical characteristics but differ in transistor polarity combinations within the same small outline package.
Direct substitutes include PEMD13/1F which shares the SOT-363 package and electrical parameters. Verify pin compatibility and resistor values when replacing with other RET families. Ensure the alternative device meets the same AEC-Q101 qualification standards if automotive reliability is required.