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The Nexperia PUMD15-QF is a dual Resistor-Equipped Transistor (RET) featuring an NPN and a PNP transistor within a SOT363-3 (SC-88/TSSOP6) surface-mounted package. It provides a collector-emitter voltage (VCEO) of 50 V and an output current capability of 100 mA per transistor. The device includes built-in bias resistors, with R1 specified at 4.7 kΩ and an R2/R1 ratio of 1. Total power dissipation is rated at 200 mW per transistor and 300 mW for the device. Operating temperatures range from -65 °C to +150 °C. The component is qualified according to AEC-Q101 standards.
Verify the specific suffix 'F' against official Nexperia documentation to confirm packaging details such as reel or cut tape specifications. Ensure the ordering code matches the required automotive qualification status. Confirm availability through authorized distributors as supply levels may vary. Cross-reference the marking code D0% for authenticity during inspection.
Select this RET when space constraints require combining two transistors and biasing resistors into one footprint. The 4.7 kΩ internal resistors suit standard logic interface applications. Verify that the 50 V rating meets system voltage requirements. Consider the thermal resistance characteristics if operating near maximum temperature limits.
The PUMD15-Q belongs to Nexperia's family of resistor-equipped double transistors. Complementary variants include the PUMH15-Q (NPN/NPN) and PUMB15-Q (PNP/PNP). This series replaces discrete components on printed-circuit boards, offering a standardized solution for signal switching and level shifting in compact electronic designs.
Direct functional substitutes include PUMD15-Q without suffix variations if packaging aligns. Check pinout compatibility with SOT363-3 footprints. Verify resistor values match the 4.7 kΩ specification. Ensure thermal performance meets application needs.