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The Nexperia PUMD15,115 is a dual Resistor-Equipped Transistor (RET) containing one NPN and one PNP transistor in a SOT363-3 (TSSOP6) package. It features built-in bias resistors with R1 = 4.7 kΩ and R2 = 4.7 kΩ. The device supports a maximum collector-emitter voltage of 50 V and an output current of 100 mA per transistor. Total power dissipation is rated at 300 mW for the device and 200 mW per transistor at 25 °C ambient temperature. The component is AEC-Q101 qualified for automotive applications.
Verify the specific ordering suffix matches the required packaging format, such as tape and reel or cut tape, as indicated by the distributor part number. Confirm the manufacturing site code associated with the marking code 'D' on the component body. Ensure the procurement channel provides valid traceability documentation for the AEC-Q101 qualification status required for automotive integration.
Select this component when a compact solution for driving low-current loads or interfacing with digital logic inputs is required. The integrated bias resistors eliminate external base resistor components. Verify that the 50 V voltage rating and 100 mA current capability meet the specific load requirements of the target application circuit before finalizing the design.
The PUMD15 belongs to the Nexperia PUMD series of NPN/PNP resistor-equipped double transistors. It serves as the complement to the PUMH15 (NPN/NPN) and PUMB15 (PNP/PNP) variants. This family utilizes the SOT363-3 package to replace multiple discrete devices on a printed circuit board, offering space savings and simplified assembly processes for digital switching applications.
Direct functional equivalents include the PUMH15 for NPN/NPN configurations and the PUMB15 for PNP/PNP configurations within the same package footprint. Cross-reference with other manufacturers' dual RETs only if pinout compatibility and electrical parameters such as VCEO and hFE are strictly verified against the official datasheet specifications.