SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The Nexperia PUMD19,115 is a dual NPN/PNP resistor-equipped transistor housed in a SOT363 (SC-88) plastic surface-mount package. It integrates an NPN transistor with a built-in 22 kΩ input bias resistor and a standalone PNP transistor. Key electrical parameters include a collector-emitter voltage of 50 V for both devices, a maximum DC output current of 100 mA, and a minimum DC current gain (hFE) of 100 at IC = 1 mA. The device supports a total power dissipation of 300 mW per device and operates within an ambient temperature range of -65°C to +150°C.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm the packing method, as variations exist between standard taping and reverse taping configurations. Ensure compatibility with the intended PCB footprint and reflow soldering profiles specified in the thermal characteristics section.
Select this component when space constraints require combining a biased switching element with an additional unbuffered transistor. The integrated 22 kΩ resistor on the NPN side simplifies base drive circuits, while the independent PNP provides flexibility for complementary logic or level shifting tasks without requiring separate discrete components.
This part belongs to the PUMD series of resistor-equipped transistors designed for high-density surface-mount applications. It serves as a functional replacement for multiple discrete components, specifically targeting designs where board real estate and assembly complexity are critical factors in portable and consumer electronics.
PEMD19
The NPN transistor includes a built-in 22 kΩ bias resistor at its input. The PNP transistor does not have an internal resistor; its base connection is open.
Both the NPN and PNP transistors have a maximum collector-emitter voltage (VCEO) rating of 50 V.
The minimum DC current gain (hFE) is specified as 100, measured at a collector current of 1 mA and a collector-emitter voltage of 5 V.